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Renaud Pacalet / sab4z
CeCILL Free Software License Agreement v2.1A simple example design for Zynq-based boards. VHDL design of custom HW mapped in Programmable Logic, Linux - Busybox - Buildroot SW stack, user SW applications interacting with custom hardware, Linux drivers, SW and HW debugging.
Updated -
Updated
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Teralab / AI Experiment Hello World
Apache License 2.0Updated