Commit 018d8a49 authored by Siyuan Niu's avatar Siyuan Niu

fpga smartcard seems ok

parent 1d33d266
......@@ -24,7 +24,7 @@ OS := $(shell uname)
MODULE = run
include Makefile.src
SRCS_base = app/TMLTask.cpp app/TMLCommand.cpp TMLTransaction.cpp app/TMLChannel.cpp arch/SchedulableDevice.cpp arch/CPU.cpp arch/FPGA.cpp arch/SingleCoreCPU.cpp arch/MultiCoreCPU.cpp app/TMLWriteCommand.cpp app/TMLWriteMultCommand.cpp app/TMLStateChannel.cpp app/TMLbrbwChannel.cpp app/TMLnbrnbwChannel.cpp app/TMLbrnbwChannel.cpp app/TMLReadCommand.cpp app/TMLExeciCommand.cpp app/TMLExeciRangeCommand.cpp app/TMLActionCommand.cpp app/TMLChoiceCommand.cpp app/TMLRandomChoiceCommand.cpp app/TMLWaitCommand.cpp app/TMLSendCommand.cpp app/TMLSelectCommand.cpp app/TMLRequestCommand.cpp app/TMLNotifiedCommand.cpp app/TMLRandomCommand.cpp app/TMLStopCommand.cpp arch/Bus.cpp definitions.cpp arch/Bridge.cpp arch/Memory.cpp Comment.cpp sim/Server.cpp sim/ServerLocal.cpp sim/Simulator.cpp sim/SimComponents.cpp sim/ServerIF.cpp evt/ListenersSimCmd.cpp arch/PrioScheduler.cpp arch/RRScheduler.cpp arch/RRPrioScheduler.cpp arch/WorkloadSource.cpp TEPE/AliasConstraint.cpp TEPE/EqConstraint.cpp TEPE/FSMConstraint.cpp TEPE/PropertyConstraint.cpp TEPE/PropertyStateConstraint.cpp TEPE/PropLabConstraint.cpp TEPE/PropRelConstraint.cpp TEPE/SignalConstraint.cpp TEPE/ThreeSigConstraint.cpp TEPE/TimeMMConstraint.cpp TEPE/TimeTConstraint.cpp TEPE/TwoSigConstraint.cpp
SRCS_base = app/TMLTask.cpp app/TMLCommand.cpp TMLTransaction.cpp app/TMLChannel.cpp arch/SchedulableDevice.cpp arch/CPU.cpp arch/FPGA.cpp arch/SingleCoreCPU.cpp arch/MultiCoreCPU.cpp app/TMLWriteCommand.cpp app/TMLWriteMultCommand.cpp app/TMLStateChannel.cpp app/TMLbrbwChannel.cpp app/TMLnbrnbwChannel.cpp app/TMLbrnbwChannel.cpp app/TMLReadCommand.cpp app/TMLExeciCommand.cpp app/TMLExeciRangeCommand.cpp app/TMLActionCommand.cpp app/TMLChoiceCommand.cpp app/TMLRandomChoiceCommand.cpp app/TMLWaitCommand.cpp app/TMLSendCommand.cpp app/TMLSelectCommand.cpp app/TMLRequestCommand.cpp app/TMLNotifiedCommand.cpp app/TMLRandomCommand.cpp app/TMLStopCommand.cpp arch/Bus.cpp definitions.cpp arch/Bridge.cpp arch/Memory.cpp Comment.cpp sim/Server.cpp sim/ServerLocal.cpp sim/Simulator.cpp sim/SimComponents.cpp sim/ServerIF.cpp evt/ListenersSimCmd.cpp arch/PrioScheduler.cpp arch/RRScheduler.cpp arch/RRPrioScheduler.cpp arch/OrderScheduler.cpp arch/WorkloadSource.cpp TEPE/AliasConstraint.cpp TEPE/EqConstraint.cpp TEPE/FSMConstraint.cpp TEPE/PropertyConstraint.cpp TEPE/PropertyStateConstraint.cpp TEPE/PropLabConstraint.cpp TEPE/PropRelConstraint.cpp TEPE/SignalConstraint.cpp TEPE/ThreeSigConstraint.cpp TEPE/TimeMMConstraint.cpp TEPE/TimeTConstraint.cpp TEPE/TwoSigConstraint.cpp
SRCS_base_DIR = src_simulator
SRCS_generated = .
......
......@@ -48,12 +48,13 @@
FPGA::FPGA( ID iID,
std::string iName,
std::string iName,
WorkloadSource* iScheduler,
TMLTime iReconfigTime,
unsigned int iChangeIdleModeCycles,
unsigned int iCyclesBeforeIdle,
unsigned int iCyclesPerExeci,
unsigned int iCyclesPerExecc ) : SchedulableDevice(iID, iName, 0)
unsigned int iCyclesPerExecc ) : SchedulableDevice(iID, iName, iScheduler)
,_reconfigTime(iReconfigTime)
,_lastTransaction(0)
,_changeIdleModeCycles(iChangeIdleModeCycles)
......@@ -249,16 +250,14 @@ std::cout<<"fpga addTransaction"<<std::endl;
} else return false;
}
void FPGA::schedule(){
std::cout << "fpga:schedule BEGIN " << _name << "+++++++++++++++++++++++++++++++++\n";
/* for(TaskList::iterator it=_taskList.begin();it!=_taskList.end();++it){
std::cout<<"hahah"<<std::endl;
std::cout<<(*it)->toShortString()<<std::endl;
}*/
// std::cout<<"trans number is "<<_transNumber<<std::endl;
_scheduler->schedule(_endSchedule);
TMLTransaction* aOldTransaction = _nextTransaction;
TaskList::const_iterator iter_task=_taskList.begin();
_nextTransaction=_scheduler->getNextTransaction(_endSchedule);
/* TaskList::const_iterator iter_task=_taskList.begin();
std::advance(iter_task,_transNumber);
if(iter_task!=_taskList.end()){
_nextTransaction=(*iter_task)->getNextTransaction(_endSchedule);
......@@ -271,17 +270,14 @@ void FPGA::schedule(){
else if(_nextTransaction->getCommand()->getProgress()==_nextTransaction->getLength())
_transNumber++;
}
*/
if (aOldTransaction!=0 && aOldTransaction!=_nextTransaction){ //NEW
if (_masterNextTransaction!=0) {
_masterNextTransaction->registerTransaction(0);
}
}
if (_nextTransaction!=0 && aOldTransaction != _nextTransaction) {
std::cout<<"trans progress "<<_nextTransaction->getCommand()->getProgress()<<std::endl;
std::cout<<"trans length "<<_nextTransaction->getCommand()->getLength()<<std::endl;
calcStartTimeLength();}
if (_nextTransaction!=0 && aOldTransaction != _nextTransaction) calcStartTimeLength();
std::cout << "fpga:schedule END " << _name << "+++++++++++++++++++++++++++++++++\n";
}
......
......@@ -70,6 +70,7 @@ public:
/**
\param iID ID of the device
\param iName Name of the device
\param iScheduler Pointer to the scheduler object
\param iReconfigTime reconfiguration time
\param iChangeIdleModeCycles Cycles needed to switch into indle mode
\param iCyclesBeforeIdle Pointer to the max consecutive cycles before idle in cycle
......@@ -77,7 +78,7 @@ public:
\param iCyclesPerExecc Cycles needed to execute one EXECC unit
*/
FPGA(ID iID, std::string iName, TMLTime iReconfigTime, unsigned int iChangeIdleModeCycles, unsigned int iCyclesBeforeIdle,unsigned int iCyclesPerExeci, unsigned int iCyclesPerExecc);
FPGA(ID iID, std::string iName, WorkloadSource* iScheduler, TMLTime iReconfigTime, unsigned int iChangeIdleModeCycles, unsigned int iCyclesBeforeIdle,unsigned int iCyclesPerExeci, unsigned int iCyclesPerExecc);
///Destructor
virtual ~FPGA();
///Determines the next FPGA transaction to be executed
......@@ -124,6 +125,7 @@ public:
*/
virtual void registerTask(TMLTask* iTask){
_taskList.push_back(iTask);
if (_scheduler!=0) _scheduler->addWorkloadSource(iTask);
}
inline void setTransNumber(unsigned int num) { _transNumber=num;}
inline unsigned int getTransNumber() { return _transNumber;}
......
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment